agileREF_LP
The agileREF_LP consists of: A bandgap reference core. A bandgap reference voltage generator (VREF) (Reference current outputs allow for remote reconstruction of an accurate reference voltage.) Bias current generators (IBIAS) (Temperature independent bias current generators)
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Samsung Foundry and SMIC as well as other IC foundries and manufacturers.
Input voltage range: 1.8V (±10%) • Digital voltage range: 0.8V (±10%) • Untrimmed accuracy: -5 to +5% (min/max) • Trimmed accuracy: -1 to +1% (min/max) • Bias current output: 200nA (typical) • Quiescent current (IQ): 4.07mA (typical) • Silicon area: 0.0284 mm2 in 16nm technology • PSRR: @f < 1MHz: 60dB (typical) • @f ≥ 1MHz: 30dB (typical)
Low IQ : Low current consumption for power sensitive applications • Multiple Outputs: Use as a single reference source for your SoC/ASIC
Block Diagram | Low Power BandGap | | agileREF_LP
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