agileLDO
The agileLDO is a linear Low Drop-Out voltage regulator (LDO) providing precision and programmable voltage regulation. The regulator architecture provides a high dynamic performance making it suitable for demanding digital applications. Whilst the low noise and high PSRR lends itself to powering noise-sensitive analog circuits. We have a selection of LDOs, with both capless and externally biased options, supporting a wide range of input voltage, output voltage, and output current.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.
Input voltage range: PDK VddIO • Programmable output voltage range • Current load: <1mA to 100mA • PSRR • @DC Typ: 40dB • @1MHz Typ: 20dB • Load regulation: Typ 0.3 %/V • Line regulation: Typ 50mV/A • Quiescent current (Iq): Typ 100uA • Customizable design for simple SoC integration • Integrated test mode • Silicon area – Please contact Agile Analog
Performance: Low noise and high PSRR for noise-sensitive analog circuits Sense input • Low noise and high PSRR for noise-sensitive analog circuits
Combine with agileVGlitch and agilePOR to create a self contained voltage attack sensor subsystem • System level Macro/Chiplet • Configured to your exact specification • Deliverables include: Verilog-a, GDSII, Liberty, PVT/Monte Carlo analysis
Block Diagram | Low Drop-Out Linear Regulator | agileLDO
Take a look at this selection of Agile Analog product and marketing related information. These press releases offer some interesting insights into our industry collaborations and product development work.
