Agile Analog, a leading innovator in analog IP, is pleased to announce that the company has joined the Intel Foundry Services (IFS) Accelerator IP Alliance Program. Through this collaboration Agile Analog will make its pioneering analog IP product portfolio available to the IFS ecosystem to help drive forward innovation in semiconductor design.
Members of the IFS Accelerator IP Alliance Program play an important role in the global semiconductor design sector, giving designers access to high-quality IPs and supporting their design requirements while optimizing key elements such as performance and power.
According to Barry Paterson, CEO at Agile Analog;
“The Program is well aligned with Agile Analog’s core mission around reducing design barriers, risk and cost, enabling a faster time-to-market for a new generation of devices.”
Barry explains;
“Using our innovative Composa™ methodology, analog circuits can be designed more quickly and to a higher quality. This helps to accelerate innovation in semiconductor design.”
“Our IP product portfolio covers areas such as power management, data conversion and always-on-circuitry, which are key considerations for chip designers. We believe our disruptive analog IP technology will be of great interest to the IFS ecosystem.”
Agile Analog is transforming the world of analog IP with Composa, its innovative, configurable, multi-process analog IP technology. Headquartered in Cambridge, UK, with a growing number of partners and customers across the globe, Agile Analog has developed a unique way to automatically generate analog IP that meet the customer’s exact specifications on almost any process from any foundry. The company provides a wide and ever expanding selection of analog IP and subsystems for power management, data conversion, IC health and monitoring, security and always-on domains. Agile Analog's novel approach utilizes tried and tested analog circuits within its Composa library to create customized and verified analog IP solutions. This reduces the time to market and increases quality, helping to accelerate innovation in semiconductor design.
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