Agile Analog

agileADC GP Analog-to-Digital Converter

Key Features

The agileADC GP analog-to-digital converter is a traditional Charge-Sharing SAR ADC that is referenced to VDD, VSS. The architecture capable of achieving up to 10-bit resolution at sample rates up to 20 Msps and up to 12-bit resolution at lower frequencies. It includes an eight-channel input multiplexor. Some inputs will be buffered inside the ADC, whereas others will bypass the buffer and be connected directly to the ADC to provide full rail-to-rail capability.

​The agileADC GP analog-to-digital converter is ideally suited for signal conversion and monitoring in applications such as in IoT, Security, Automotive, AI and general SoCs and ASICs.​

Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. The agileADC GP analog-to-digital converter is available on CMOS and FD-SOI processes from 0.18um down to 22nm.


​Our engineers have extensive experience in taking complex SoCs from design to mass production. We believe that success is not just measured by delivery of CDL and GDSII, rather it extends to mass production and beyond. This is reflected in the industry-leading quality of our deliverables. Our IP comes with a complete set of deliverables for ease of integration allowing our customers to produce their SoCs reliably, quickly and effortlessly.​